In the past, Metal Oxide Semiconductor Field Effect Transistors (MOSFETs) were frequently fabricated as bulk semiconductor devices in which the device features were defined on the surface of a bulk semiconductor wafer. However, as MOSFET devices have continued to shrink in size, and as the transistor densities in these devices have increased accordingly, the disadvantages associated with bulk MOSFETs have become increasingly apparent. These disadvantages include an often less than ideal sub-threshold voltage rolloff, short channel effects, drain induced barrier lowering, high junction capacitance, ineffective isolation, and low saturation current.
As a result, many MOSFET devices today are fabricated on Semiconductor-On-Insulator (SOI) wafers rather than on bulk substrates. SOI wafers feature a thin semiconductor layer which is disposed over a (typically oxide) dielectric layer. Transistors fabricated on such wafers offer the potential of superior performance characteristics due to the thin film nature of the semiconductor substrate and the electrically insulating properties of the underlying dielectric layer. Hence, compared to analogous bulk devices, SOI MOSFETs may manifest superior short channel performance, near-ideal subthreshold voltage swings (which results in low off-state current leakage), and high saturation current.
However, despite their advantages, SOI devices present their own set of challenges. One of these challenges is the floating-body effect, a phenomenon manifested as a decrease in voltage between the source and the drain regions. This effect is especially problematic for partially depleted SOI MOSFETs of the type currently used in some memory devices.